IEEE 1450.6.2 : 2014
IEEE 1450.6.2 : 2014
MEMORY MODELING IN CORE TEST LANGUAGE (CTL)
Institute of Electrical & Electronics Engineers
MEMORY MODELING IN CORE TEST LANGUAGE (CTL)
Institute of Electrical & Electronics Engineers
1 Overview
2 Normative references
3 Definitions, acronyms, and abbreviations
4 Extensions to IEEE Std 1450.6-2005
5 MemoryRepairblock
6 MemoryPhysicalOrganizationblock
7 Memory CTL Orientation and Capabilities Tutorial
Specifies language constructs sufficient to represent the context of a memory core and of the integration of that memory core into an SoC.
Document Type | Standard |
Status | Current |
Publisher | Institute of Electrical & Electronics Engineers |